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author | 2012-03-30 13:16:37 -0400 | |
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committer | 2012-08-28 01:50:03 -0500 | |
commit | 8d45ae83523ae29fc05c6a3f7af3d863e3af18e7 (patch) | |
tree | 83b90477b0d20dcb08ccb1408a83644a9e035ce9 | |
parent | target-mips: Streamline indexed cp1 memory addressing. (diff) | |
download | qemu-kvm-8d45ae83523ae29fc05c6a3f7af3d863e3af18e7.tar.gz qemu-kvm-8d45ae83523ae29fc05c6a3f7af3d863e3af18e7.tar.bz2 qemu-kvm-8d45ae83523ae29fc05c6a3f7af3d863e3af18e7.zip |
mips-linux-user: Always support rdhwr.
The kernel will emulate this instruction if it's not supported
natively. This insn is used for TLS, among other things, and
so is required by modern glibc.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Cc: Riku Voipio <riku.voipio@iki.fi>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit b3167288367f79754b74ad933146e37938ebff13)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
-rw-r--r-- | target-mips/translate.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index cb6077d80..1f1d43488 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -8111,7 +8111,11 @@ gen_rdhwr (CPUMIPSState *env, DisasContext *ctx, int rt, int rd) { TCGv t0; +#if !defined(CONFIG_USER_ONLY) + /* The Linux kernel will emulate rdhwr if it's not supported natively. + Therefore only check the ISA in system mode. */ check_insn(env, ctx, ISA_MIPS32R2); +#endif t0 = tcg_temp_new(); switch (rd) { |