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* arm: drop unused irq-related part of CPUARMStateDmitry Eremin-Solenikov2011-02-111-4/+0
* target-arm: Remove stray #include from middle of neon_helper.cPeter Maydell2011-02-101-1/+0
* target-arm: Use standard FPSCR for Neon half-precision operationsPeter Maydell2011-02-103-12/+32
* target-arm: Silence NaNs resulting from half-precision conversionsPeter Maydell2011-02-101-2/+10
* softfloat: Add float16 type and float16 NaN handling functionsPeter Maydell2011-02-101-2/+2
* target-arm: implement vsli.64, vsri.64Christophe Lyon2011-02-091-1/+13
* target-arm: fix VSHLL Neon instruction.Christophe Lyon2011-02-091-3/+15
* target-arm: Fix 32 bit signed saturating narrowPeter Maydell2011-02-091-1/+1
* target-arm: Fix VQMOVUN Neon instruction.Juha Riihimäki2011-02-093-6/+88
* target-arm: Fix decoding of Thumb preload and hint spacePeter Maydell2011-02-041-22/+48
* target-arm: Fix decoding of preload and memory hint spacePeter Maydell2011-02-041-3/+25
* target-arm: Clean up handling of MPIDRPeter Maydell2011-02-041-5/+21
* target-arm: Add CPU feature flag for v7MPPeter Maydell2011-02-042-1/+8
* Set the right overflow bit for neon 32 and 64 bit saturating add/sub.Christophe Lyon2011-02-044-63/+105
* target-arm: Fix Neon vsra instructions.Christophe Lyon2011-02-041-2/+2
* target-arm: Fix Neon VQ(R)DMULH.S16 instructionsJuha Riihimäki2011-01-291-1/+2
* target-arm: Fix loading of scalar value for Neon multiply-by-scalarPeter Maydell2011-01-261-6/+6
* target-arm: Fix garbage collection of temporaries in Neon emulation.Christophe Lyon2011-01-261-5/+13
* Support saturation with shift=0.Christophe Lyon2011-01-261-16/+12
* target-arm: Log instruction start in TCG codePeter Maydell2011-01-181-0/+4
* target-arm: Restore IT bits when resuming after an exceptionPeter Maydell2011-01-141-0/+36
* target-arm: Refactor translation of exception generating instructionsPeter Maydell2011-01-141-28/+15
* target-arm: Remove redundant setting of IT bits before Thumb SWIPeter Maydell2011-01-141-1/+0
* target-arm: Translate with user-state from TB flags, not CPUStatePeter Maydell2011-01-141-5/+1
* target-arm: Set privileged bit in TB flags correctly for M profilePeter Maydell2011-01-141-1/+7
* target-arm: Translate with condexec bits from TB flags, not CPUStatePeter Maydell2011-01-141-3/+3
* target-arm: Translate with Thumb state from TB flags, not CPUStatePeter Maydell2011-01-141-3/+3
* target-arm: Translate with VFP len/stride from TB flags, not CPUStatePeter Maydell2011-01-141-3/+7
* target-arm: Translate with VFP-enabled from TB flags, not CPUStatePeter Maydell2011-01-141-9/+5
* target-arm: Add symbolic constants for bitfields in TB flagsPeter Maydell2011-01-141-6/+39
* target-arm: Don't generate code specific to current CPU mode for SRSPeter Maydell2011-01-142-33/+25
* target-arm: Use the standard FPSCR value for VRSQRTSPeter Maydell2011-01-141-1/+1
* target-arm: Add support for 'Standard FPSCR Value' as used by NeonPeter Maydell2011-01-142-0/+18
* target-arm: Fix implementation of VRSQRTSPeter Maydell2011-01-141-1/+9
* ARM: Fix decoding of VQSHL/VQSHLU immediate formsPeter Maydell2011-01-121-15/+36
* ARM: add neon helpers for VQSHLUJuha Riihimäki2011-01-122-0/+51
* target-arm: wire up the softfloat flush_input_to_zero flagPeter Maydell2011-01-061-1/+7
* target-arm: Set softfloat cumulative exc flags from correct FPSCR bitsPeter Maydell2011-01-061-1/+1
* target-arm: fix SMMLA/SMMLS instructionsAurelien Jarno2011-01-061-45/+51
* target-arm: fix UMAAL instructionAurelien Jarno2010-12-311-10/+22
* target-arm: correct cp15 c1_sys reset value for arm1136 and cortex-a9Juha Riihimäki2010-12-271-0/+2
* target-arm: correct cp15 c1_sys reset value for cortex-a8Mattias Holm2010-12-271-0/+1
* target-arm: fix vmsav6 access controlJuha Riihimäki2010-12-271-15/+19
* target-arm: Correct result in saturating cases for VQSHL of s8/16/32Peter Maydell2010-12-271-3/+12
* target-arm: remove pointless else clause in VQSHL of u64Juha Riihimäki2010-12-271-2/+0
* target-arm: Fix VQSHL of signed 64 bit values by shift counts >= 64Peter Maydell2010-12-271-1/+1
* target-arm: Fix VQSHL of signed 64 bit valuesJuha Riihimäki2010-12-271-1/+1
* target-arm: Fix arguments passed to VQSHL helpersJuha Riihimäki2010-12-271-2/+2
* target-arm: fix bug in translation of REVSHAurelien Jarno2010-12-271-7/+3
* ARM: Implement VCVT to 16 bit integer using new softfloat routinesPeter Maydell2010-12-071-1/+1