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authorMichael Weber <xmw@gentoo.org>2010-11-07 18:18:46 +0000
committerMichael Weber <xmw@gentoo.org>2010-11-07 18:18:46 +0000
commit6f932f822463b735baac86cf7c70514cc7ce52c0 (patch)
treeeaa117d3e0c984da507dce5fb7926d89096d0d02 /sys-power
parentdev-lisp/cl-rsm-mpoly removal, p.masked from 17Sep2010, wrt bug #337963 (diff)
downloadhistorical-6f932f822463b735baac86cf7c70514cc7ce52c0.tar.gz
historical-6f932f822463b735baac86cf7c70514cc7ce52c0.tar.bz2
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Added 2.6.36 support
Package-Manager: portage-2.1.8.3/cvs/Linux x86_64
Diffstat (limited to 'sys-power')
-rw-r--r--sys-power/phc-intel/ChangeLog9
-rw-r--r--sys-power/phc-intel/Manifest5
-rw-r--r--sys-power/phc-intel/files/phc-intel-0.3.2.12.1-2.6.36.patch529
-rw-r--r--sys-power/phc-intel/phc-intel-0.3.2.12.1-r2.ebuild (renamed from sys-power/phc-intel/phc-intel-0.3.2.12.1-r1.ebuild)14
4 files changed, 547 insertions, 10 deletions
diff --git a/sys-power/phc-intel/ChangeLog b/sys-power/phc-intel/ChangeLog
index 01aa9a987f54..71dc2e1f0a62 100644
--- a/sys-power/phc-intel/ChangeLog
+++ b/sys-power/phc-intel/ChangeLog
@@ -1,6 +1,13 @@
# ChangeLog for sys-power/phc-intel
# Copyright 1999-2010 Gentoo Foundation; Distributed under the GPL v2
-# $Header: /var/cvsroot/gentoo-x86/sys-power/phc-intel/ChangeLog,v 1.2 2010/08/24 18:32:43 xmw Exp $
+# $Header: /var/cvsroot/gentoo-x86/sys-power/phc-intel/ChangeLog,v 1.3 2010/11/07 18:18:46 xmw Exp $
+
+*phc-intel-0.3.2.12.1-r2 (07 Nov 2010)
+
+ 07 Nov 2010; Michael Weber <xmw@gentoo.org>
+ -phc-intel-0.3.2.12.1-r1.ebuild, +phc-intel-0.3.2.12.1-r2.ebuild,
+ +files/phc-intel-0.3.2.12.1-2.6.36.patch:
+ Added 2.6.36 support
24 Aug 2010; Michael Weber <xmw@gentoo.org> ChangeLog:
New ebuild for sys-power/phc-intel. Ebuild written by me, taken from
diff --git a/sys-power/phc-intel/Manifest b/sys-power/phc-intel/Manifest
index bbe9ea318e8c..51ba23d2f079 100644
--- a/sys-power/phc-intel/Manifest
+++ b/sys-power/phc-intel/Manifest
@@ -1,9 +1,10 @@
AUX phc-intel-0.3.2.12.1-2.6.35.patch 16089 RMD160 55922770688369b9c7eabb11727efa0832a28954 SHA1 8e645cd5e81ca630b478dc3c71980bb67a6bda25 SHA256 dee0ce62588bf74fe80d12743674064a2d2f2edff39ac7751511817f0e7d41e3
+AUX phc-intel-0.3.2.12.1-2.6.36.patch 15957 RMD160 5ec9633d3447df20b4b1838ebc83d558b0a5d18d SHA1 86ff3e3afff68f76e2c96948fb54bda86dd09404 SHA256 93ca6bb4c63ed5ac88f33b94d543091ce3b17a425967682d9431ea3b85bff632
DIST phc-intel-0.3.199.3_pre.tar.bz2 15508 RMD160 0348c0776f11beda14befbdfaf2f246516e68558 SHA1 b51c7d6123c1a45dcf7cd54273ce642ef8f7895a SHA256 4441af7a0a1335a920b0d18a46483a64fbae8e57d98a6bdbf31dbacac2bbdf82
DIST phc-intel-0.3.2.10.tar.bz2 20680 RMD160 c9af322d7234c83aef348eb1b01cccf1f5cb1b18 SHA1 3e8b3e2f5732ace6e76146bd820448fd17369c31 SHA256 8483e071ad2644c339539ac5298c7a31a12212fd9a68baa1f6766dad146510f5
DIST phc-intel-0.3.2.12.1.tar.bz2 14412 RMD160 d8a8ca003f0af2d1f8e7a59ab8739a51afceafd3 SHA1 d5c991376f7ce7f3b7afa6fc7618b4ba602bf457 SHA256 4f66989d424d328b205873da1b0363e75f27d7912e0e93c1cad3407c17be8264
EBUILD phc-intel-0.3.199.3_pre.ebuild 1201 RMD160 bcace92a9dac5f7fcb9a18a3d9d2a196cc3c00da SHA1 787d5420553c6c6c979a9e0b8eb39a229679150a SHA256 cf022fadc97cd3b56ed3888b9f645d8943447a741627b2d80e19cb315147a1c0
EBUILD phc-intel-0.3.2.10.ebuild 1079 RMD160 aff8b2924d4878da10ec374d9c8c179a3c1d6d23 SHA1 5c445495287110484664ce0312d539e8f170ec21 SHA256 19ed93eab1feeb9cd3aa214ba76ff5834cff06cb821676842574e6075f8a92c4
-EBUILD phc-intel-0.3.2.12.1-r1.ebuild 1521 RMD160 9e4e6aa328400e5bc6925fd58d3f780163fc8a12 SHA1 f8333ba7b3e407e02c58451b798a551db06759cf SHA256 42efa3381d07e86f3739a608a98842ec807a1efd3d4e3b06480b140f5e7fb34d
-MISC ChangeLog 367 RMD160 c8904f87d1f814c34937720175e24d912d132481 SHA1 60cdef2fb378d1ed094576f6474589eb58190c5a SHA256 402ec9b2116d39b66e57a1028153fc0841f66c944d0ec5bfb9363082ee27c8aa
+EBUILD phc-intel-0.3.2.12.1-r2.ebuild 1597 RMD160 c1f26c8cf7538021e2b6070a2ebc44ad6d77f9d6 SHA1 670a5f6a901d9b10ac7a380eae9c30153b6a153d SHA256 7eb82405ff8a7319819d35db9e2a73c2a38273fa845c73570df16fd6133ecccd
+MISC ChangeLog 589 RMD160 a9cbe43cc0f75a710b71871b5d3c2e75b439b8c9 SHA1 9dafa676d05ff18cfc9585fe9ec284943a7e4c3c SHA256 32b332642fe8514eed009874a28dfc6ec51a15f458bc576b13598de3cee51c16
MISC metadata.xml 244 RMD160 ba31bc851ce5d8e007b223b4f799d84d4c6699d0 SHA1 2192e855054fb7016488afba3eda6d938fdf925d SHA256 1022f65be1952b5197408dfbf61543b61557601ce3a9f15acabeb3e9d84a0fbe
diff --git a/sys-power/phc-intel/files/phc-intel-0.3.2.12.1-2.6.36.patch b/sys-power/phc-intel/files/phc-intel-0.3.2.12.1-2.6.36.patch
new file mode 100644
index 000000000000..f99738d0bb71
--- /dev/null
+++ b/sys-power/phc-intel/files/phc-intel-0.3.2.12.1-2.6.36.patch
@@ -0,0 +1,529 @@
+--- /tmp/acpi-cpufreq.c.orig 2010-08-07 09:25:45.510440771 +0200
++++ /tmp/acpi-cpufreq.c 2010-08-07 09:25:56.090496225 +0200
+@@ -25,6 +25,10 @@
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ */
+
++/* This file has been patched with Linux PHC: www.linux-phc.org
++* Patch version: linux-phc-0.3.2
++*/
++
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/init.h>
+@@ -62,12 +66,17 @@
+ };
+
+ #define INTEL_MSR_RANGE (0xffff)
++#define INTEL_MSR_VID_MASK (0x00ff)
++#define INTEL_MSR_FID_MASK (0xff00)
++#define INTEL_MSR_FID_SHIFT (0x8)
++#define PHC_VERSION_STRING "0.3.2:2"
+
+ struct acpi_cpufreq_data {
+ struct acpi_processor_performance *acpi_data;
+ struct cpufreq_frequency_table *freq_table;
+ unsigned int resume;
+ unsigned int cpu_feature;
++ acpi_integer *original_controls;
+ };
+
+ static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
+@@ -103,13 +112,14 @@
+ static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
+ {
+ int i;
++ u32 fid;
+ struct acpi_processor_performance *perf;
+
+- msr &= INTEL_MSR_RANGE;
++ fid = msr & INTEL_MSR_FID_MASK;
+ perf = data->acpi_data;
+
+ for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+- if (msr == perf->states[data->freq_table[i].index].status)
++ if (fid == (perf->states[data->freq_table[i].index].status & INTEL_MSR_FID_MASK))
+ return data->freq_table[i].frequency;
+ }
+ return data->freq_table[0].frequency;
+@@ -704,6 +714,8 @@
+ per_cpu(acfreq_data, policy->cpu) = NULL;
+ acpi_processor_unregister_performance(data->acpi_data,
+ policy->cpu);
++ if (data->original_controls)
++ kfree(data->original_controls);
+ kfree(data);
+ }
+
+@@ -721,8 +733,470 @@
+ return 0;
+ }
+
++
++/* sysfs interface to change operating points voltages */
++
++static unsigned int extract_fid_from_control(unsigned int control)
++{
++ return ((control & INTEL_MSR_FID_MASK) >> INTEL_MSR_FID_SHIFT);
++}
++
++static unsigned int extract_vid_from_control(unsigned int control)
++{
++ return (control & INTEL_MSR_VID_MASK);
++}
++
++
++static bool check_cpu_control_capability(struct acpi_cpufreq_data *data) {
++ /* check if the cpu we are running on is capable of setting new control data
++ *
++ */
++ if (unlikely(data == NULL ||
++ data->acpi_data == NULL ||
++ data->freq_table == NULL ||
++ data->cpu_feature != SYSTEM_INTEL_MSR_CAPABLE)) {
++ return false;
++ } else {
++ return true;
++ };
++}
++
++
++static ssize_t check_origial_table (struct acpi_cpufreq_data *data)
++{
++
++ struct acpi_processor_performance *acpi_data;
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int state_index;
++
++ acpi_data = data->acpi_data;
++ freq_table = data->freq_table;
++
++ if (data->original_controls == NULL) {
++ // Backup original control values
++ data->original_controls = kcalloc(acpi_data->state_count,
++ sizeof(acpi_integer), GFP_KERNEL);
++ if (data->original_controls == NULL) {
++ printk("failed to allocate memory for original control values\n");
++ return -ENOMEM;
++ }
++ for (state_index = 0; state_index < acpi_data->state_count; state_index++) {
++ data->original_controls[state_index] = acpi_data->states[state_index].control;
++ }
++ }
++ return 0;
++}
++
++static ssize_t show_freq_attr_vids(struct cpufreq_policy *policy, char *buf)
++ /* display phc's voltage id's
++ *
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct acpi_processor_performance *acpi_data;
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int i;
++ unsigned int vid;
++ ssize_t count = 0;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV; //check if CPU is capable of changing controls
++
++ acpi_data = data->acpi_data;
++ freq_table = data->freq_table;
++
++ for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
++ vid = extract_vid_from_control(acpi_data->states[freq_table[i].index].control);
++ count += sprintf(&buf[count], "%u ", vid);
++ }
++ count += sprintf(&buf[count], "\n");
++
++ return count;
++}
++
++static ssize_t show_freq_attr_default_vids(struct cpufreq_policy *policy, char *buf)
++ /* display acpi's default voltage id's
++ *
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int i;
++ unsigned int vid;
++ ssize_t count = 0;
++ ssize_t retval;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV; //check if CPU is capable of changing controls
++
++ retval = check_origial_table(data);
++ if (0 != retval)
++ return retval;
++
++ freq_table = data->freq_table;
++
++ for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
++ vid = extract_vid_from_control(data->original_controls[freq_table[i].index]);
++ count += sprintf(&buf[count], "%u ", vid);
++ }
++ count += sprintf(&buf[count], "\n");
++
++ return count;
++}
++
++static ssize_t show_freq_attr_fids(struct cpufreq_policy *policy, char *buf)
++ /* display phc's frequeny id's
++ *
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct acpi_processor_performance *acpi_data;
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int i;
++ unsigned int fid;
++ ssize_t count = 0;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV; //check if CPU is capable of changing controls
++
++ acpi_data = data->acpi_data;
++ freq_table = data->freq_table;
++
++ for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
++ fid = extract_fid_from_control(acpi_data->states[freq_table[i].index].control);
++ count += sprintf(&buf[count], "%u ", fid);
++ }
++ count += sprintf(&buf[count], "\n");
++
++ return count;
++}
++
++static ssize_t show_freq_attr_controls(struct cpufreq_policy *policy, char *buf)
++ /* display phc's controls for the cpu (frequency id's and related voltage id's)
++ *
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct acpi_processor_performance *acpi_data;
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int i;
++ unsigned int fid;
++ unsigned int vid;
++ ssize_t count = 0;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV; //check if CPU is capable of changing controls
++
++ acpi_data = data->acpi_data;
++ freq_table = data->freq_table;
++
++ for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
++ fid = extract_fid_from_control(acpi_data->states[freq_table[i].index].control);
++ vid = extract_vid_from_control(acpi_data->states[freq_table[i].index].control);
++ count += sprintf(&buf[count], "%u:%u ", fid, vid);
++ }
++ count += sprintf(&buf[count], "\n");
++
++ return count;
++}
++
++static ssize_t show_freq_attr_default_controls(struct cpufreq_policy *policy, char *buf)
++ /* display acpi's default controls for the cpu (frequency id's and related voltage id's)
++ *
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int i;
++ unsigned int fid;
++ unsigned int vid;
++ ssize_t count = 0;
++ ssize_t retval;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV; //check if CPU is capable of changing controls
++
++ retval = check_origial_table(data);
++ if (0 != retval)
++ return retval;
++
++ freq_table = data->freq_table;
++
++ for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
++ fid = extract_fid_from_control(data->original_controls[freq_table[i].index]);
++ vid = extract_vid_from_control(data->original_controls[freq_table[i].index]);
++ count += sprintf(&buf[count], "%u:%u ", fid, vid);
++ }
++ count += sprintf(&buf[count], "\n");
++
++ return count;
++}
++
++
++static ssize_t store_freq_attr_vids(struct cpufreq_policy *policy, const char *buf, size_t count)
++ /* store the voltage id's for the related frequency
++ * We are going to do some sanity checks here to prevent users
++ * from setting higher voltages than the default one.
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct acpi_processor_performance *acpi_data;
++ struct cpufreq_frequency_table *freq_table;
++ unsigned int freq_index;
++ unsigned int state_index;
++ unsigned int new_vid;
++ unsigned int original_vid;
++ unsigned int new_control;
++ unsigned int original_control;
++ const char *curr_buf = buf;
++ char *next_buf;
++ ssize_t retval;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV; //check if CPU is capable of changing controls
++
++ retval = check_origial_table(data);
++ if (0 != retval)
++ return retval;
++
++ acpi_data = data->acpi_data;
++ freq_table = data->freq_table;
++
++ /* for each value taken from the sysfs interfalce (phc_vids) get entrys and convert them to unsigned long integers*/
++ for (freq_index = 0; freq_table[freq_index].frequency != CPUFREQ_TABLE_END; freq_index++) {
++ new_vid = simple_strtoul(curr_buf, &next_buf, 10);
++ if (next_buf == curr_buf) {
++ if ((curr_buf - buf == count - 1) && (*curr_buf == '\n')) { //end of line?
++ curr_buf++;
++ break;
++ }
++ //if we didn't got end of line but there is nothing more to read something went wrong...
++ printk("failed to parse vid value at %i (%s)\n", freq_index, curr_buf);
++ return -EINVAL;
++ }
++
++ state_index = freq_table[freq_index].index;
++ original_control = data->original_controls[state_index];
++ original_vid = original_control & INTEL_MSR_VID_MASK;
++
++ /* before we store the values we do some checks to prevent
++ * users to set up values higher than the default one
++ */
++ if (new_vid <= original_vid) {
++ new_control = (original_control & ~INTEL_MSR_VID_MASK) | new_vid;
++ dprintk("setting control at %i to %x (default is %x)\n",
++ freq_index, new_control, original_control);
++ acpi_data->states[state_index].control = new_control;
++
++ } else {
++ printk("skipping vid at %i, %u is greater than default %u\n",
++ freq_index, new_vid, original_vid);
++ }
++
++ curr_buf = next_buf;
++ /* jump over value seperators (space or comma).
++ * There could be more than one space or comma character
++ * to separate two values so we better do it using a loop.
++ */
++ while ((curr_buf - buf < count) && ((*curr_buf == ' ') || (*curr_buf == ','))) {
++ curr_buf++;
++ }
++ }
++
++ /* set new voltage for current frequency */
++ data->resume = 1;
++ acpi_cpufreq_target(policy, get_cur_freq_on_cpu(policy->cpu), CPUFREQ_RELATION_L);
++
++ return curr_buf - buf;
++}
++
++static ssize_t store_freq_attr_controls(struct cpufreq_policy *policy, const char *buf, size_t count)
++ /* store the controls (frequency id's and related voltage id's)
++ * We are going to do some sanity checks here to prevent users
++ * from setting higher voltages than the default one.
++ */
++{
++ struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
++ struct acpi_processor_performance *acpi_data;
++ struct cpufreq_frequency_table *freq_table;
++ const char *curr_buf;
++ unsigned int op_count;
++ unsigned int state_index;
++ int isok;
++ char *next_buf;
++ ssize_t retval;
++ unsigned int new_vid;
++ unsigned int original_vid;
++ unsigned int new_fid;
++ unsigned int old_fid;
++ unsigned int original_control;
++ unsigned int old_control;
++ unsigned int new_control;
++ int found;
++
++ if (!check_cpu_control_capability(data)) return -ENODEV;
++
++ retval = check_origial_table(data);
++ if (0 != retval)
++ return retval;
++
++ acpi_data = data->acpi_data;
++ freq_table = data->freq_table;
++
++ op_count = 0;
++ curr_buf = buf;
++ next_buf = NULL;
++ isok = 1;
++
++ while ( (isok) && (curr_buf != NULL) )
++ {
++ op_count++;
++ // Parse fid
++ new_fid = simple_strtoul(curr_buf, &next_buf, 10);
++ if ((next_buf != curr_buf) && (next_buf != NULL))
++ {
++ // Parse separator between frequency and voltage
++ curr_buf = next_buf;
++ next_buf = NULL;
++ if (*curr_buf==':')
++ {
++ curr_buf++;
++ // Parse vid
++ new_vid = simple_strtoul(curr_buf, &next_buf, 10);
++ if ((next_buf != curr_buf) && (next_buf != NULL))
++ {
++ found = 0;
++ for (state_index = 0; state_index < acpi_data->state_count; state_index++) {
++ old_control = acpi_data->states[state_index].control;
++ old_fid = extract_fid_from_control(old_control);
++ if (new_fid == old_fid)
++ {
++ found = 1;
++ original_control = data->original_controls[state_index];
++ original_vid = extract_vid_from_control(original_control);
++ if (new_vid <= original_vid)
++ {
++ new_control = (original_control & ~INTEL_MSR_VID_MASK) | new_vid;
++ dprintk("setting control at %i to %x (default is %x)\n",
++ state_index, new_control, original_control);
++ acpi_data->states[state_index].control = new_control;
++
++ } else {
++ printk("skipping vid at %i, %u is greater than default %u\n",
++ state_index, new_vid, original_vid);
++ }
++ }
++ }
++
++ if (found == 0)
++ {
++ printk("operating point # %u not found (FID = %u)\n", op_count, new_fid);
++ isok = 0;
++ }
++
++ // Parse seprator before next operating point, if any
++ curr_buf = next_buf;
++ next_buf = NULL;
++ if ((*curr_buf == ',') || (*curr_buf == ' '))
++ curr_buf++;
++ else
++ curr_buf = NULL;
++ }
++ else
++ {
++ printk("failed to parse VID of operating point # %u (%s)\n", op_count, curr_buf);
++ isok = 0;
++ }
++ }
++ else
++ {
++ printk("failed to parse operating point # %u (%s)\n", op_count, curr_buf);
++ isok = 0;
++ }
++ }
++ else
++ {
++ printk("failed to parse FID of operating point # %u (%s)\n", op_count, curr_buf);
++ isok = 0;
++ }
++ }
++
++ if (isok)
++ {
++ retval = count;
++ /* set new voltage at current frequency */
++ data->resume = 1;
++ acpi_cpufreq_target(policy, get_cur_freq_on_cpu(policy->cpu), CPUFREQ_RELATION_L);
++ }
++ else
++ {
++ retval = -EINVAL;
++ }
++
++ return retval;
++}
++
++static ssize_t show_freq_attr_phc_version(struct cpufreq_policy *policy, char *buf)
++ /* print out the phc version string set at the beginning of that file
++ */
++{
++ ssize_t count = 0;
++ count += sprintf(&buf[count], "%s\n", PHC_VERSION_STRING);
++ return count;
++}
++
++
++
++static struct freq_attr cpufreq_freq_attr_phc_version =
++{
++ /*display phc's version string*/
++ .attr = { .name = "phc_version", .mode = 0444 },
++ .show = show_freq_attr_phc_version,
++ .store = NULL,
++};
++
++static struct freq_attr cpufreq_freq_attr_vids =
++{
++ /*display phc's voltage id's for the cpu*/
++ .attr = { .name = "phc_vids", .mode = 0644 },
++ .show = show_freq_attr_vids,
++ .store = store_freq_attr_vids,
++};
++
++static struct freq_attr cpufreq_freq_attr_default_vids =
++{
++ /*display acpi's default frequency id's for the cpu*/
++ .attr = { .name = "phc_default_vids", .mode = 0444 },
++ .show = show_freq_attr_default_vids,
++ .store = NULL,
++};
++
++static struct freq_attr cpufreq_freq_attr_fids =
++{
++ /*display phc's default frequency id's for the cpu*/
++ .attr = { .name = "phc_fids", .mode = 0444 },
++ .show = show_freq_attr_fids,
++ .store = NULL,
++};
++
++static struct freq_attr cpufreq_freq_attr_controls =
++{
++ /*display phc's current voltage/frequency controls for the cpu*/
++ .attr = { .name = "phc_controls", .mode = 0644 },
++ .show = show_freq_attr_controls,
++ .store = store_freq_attr_controls,
++};
++
++static struct freq_attr cpufreq_freq_attr_default_controls =
++{
++ /*display acpi's default voltage/frequency controls for the cpu*/
++ .attr = { .name = "phc_default_controls", .mode = 0444 },
++ .show = show_freq_attr_default_controls,
++ .store = NULL,
++};
++
+ static struct freq_attr *acpi_cpufreq_attr[] = {
+- &cpufreq_freq_attr_scaling_available_freqs,
++ &cpufreq_freq_attr_scaling_available_freqs,
++ &cpufreq_freq_attr_phc_version,
++ &cpufreq_freq_attr_vids,
++ &cpufreq_freq_attr_default_vids,
++ &cpufreq_freq_attr_fids,
++ &cpufreq_freq_attr_controls,
++ &cpufreq_freq_attr_default_controls,
+ NULL,
+ };
+
diff --git a/sys-power/phc-intel/phc-intel-0.3.2.12.1-r1.ebuild b/sys-power/phc-intel/phc-intel-0.3.2.12.1-r2.ebuild
index c947d521adcc..d8ddfb49e848 100644
--- a/sys-power/phc-intel/phc-intel-0.3.2.12.1-r1.ebuild
+++ b/sys-power/phc-intel/phc-intel-0.3.2.12.1-r2.ebuild
@@ -1,6 +1,6 @@
# Copyright 1999-2010 Gentoo Foundation
# Distributed under the terms of the GNU General Public License v2
-# $Header: /var/cvsroot/gentoo-x86/sys-power/phc-intel/phc-intel-0.3.2.12.1-r1.ebuild,v 1.1 2010/08/24 00:51:14 xmw Exp $
+# $Header: /var/cvsroot/gentoo-x86/sys-power/phc-intel/phc-intel-0.3.2.12.1-r2.ebuild,v 1.1 2010/11/07 18:18:46 xmw Exp $
EAPI=2
@@ -34,14 +34,14 @@ pkg_setup() {
}
src_prepare() {
- if kernel_is eq 2 6 35 ; then
+ local my_k="${KV_MAJOR}.${KV_MINOR}.${KV_PATCH}"
+ if kernel_is eq 2 6 35 || kernel_is eq 2 6 36 ; then
cp "${KERNEL_DIR}"/arch/x86/kernel/cpu/cpufreq/mperf.h . || die
-
- mkdir inc/2.6.35 || die
- cp "${FILESDIR}"/${P}-2.6.35.patch \
- inc/2.6.35/linux-phc-$(get_version_component_range 1-3).patch \
+ mkdir inc/${my_k} || die
+ cp "${FILESDIR}"/${P}-${my_k}.patch \
+ inc/${my_k}/linux-phc-$(get_version_component_range 1-3).patch \
|| die
- cp "${KERNEL_DIR}"/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c inc/2.6.35 || die
+ cp "${KERNEL_DIR}"/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c inc/${my_k} || die
fi
}