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path: root/sim/sh/interp.c
Commit message (Expand)AuthorAgeFilesLines
* sim: use ARRAY_SIZE instead of ad-hoc sizeof calculationsMike Frysinger2017-02-131-1/+1
* Fix primary reason why the SH simulation hasn't been working on 64 bit hosts.Oleg Endo2016-04-101-34/+12
* Adjust default memory size and stack base address for SH simulator.Oleg Endo2016-04-091-3/+3
* sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger2016-01-061-2/+4
* sim: parse_args: display getopt error ourselvesMike Frysinger2016-01-031-3/+1
* sim: use libiberty countargv in more placesMike Frysinger2016-01-031-17/+3
* sim: drop host endian configure optionMike Frysinger2016-01-031-1/+1
* sim: convert to bfd_endianMike Frysinger2016-01-031-2/+2
* sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to...Mike Frysinger2015-12-301-4/+6
* sim: sh: delete global callback/argvMike Frysinger2015-11-221-44/+35
* sim: sim-close: unify sim_close logicMike Frysinger2015-11-151-6/+0
* sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpersMike Frysinger2015-04-171-0/+21
* sim: sh: convert to nrunMike Frysinger2015-03-281-204/+74
* sim: sh: clean up some warningsMike Frysinger2015-03-281-209/+98
* sim: constify arg to sim_do_commandMike Frysinger2014-03-101-4/+4
* sim: constify prog_nameMike Frysinger2014-03-051-1/+1
* sim: delete duplicate SIGINT handlingMike Frysinger2014-02-171-13/+0
* remove PARAMS from simTom Tromey2014-01-071-16/+16
* gdb:Steve Ellcey2013-03-151-1/+1
* Update sim_fetch_register, sim_store_register for sh and mn10300.Kevin Buettner2012-02-161-3/+3
* sim: add sim_complete_command stubs for non-common-using portsMike Frysinger2011-04-161-0/+6
* sim: constify sim_write source buffer (part 2)Mike Frysinger2010-04-141-2/+2
* * interp.c: Don't include sysdep.h.Masaki Muranaka2010-02-141-1/+18
* 2008-02-04 Antony King <antony.king@st.com>Andrew Stubbs2008-02-041-13/+8
* 2005-11-10 Andrew Stubbs <andrew.stubbs@st.com>Andrew Stubbs2005-11-101-1/+1
* * interp.c (<sys/mman.h>): Include.Joern Rennecke2005-09-191-5/+35
* * interp.c (strswaplen): Add one for '\0' delimiter.Joern Rennecke2005-08-021-1/+5
* * gencode.c (movua.l): Compensate for endianness.Corinna Vinschen2004-09-081-27/+321
* 2004-02-12 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-02-121-3/+3
* 2004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-101-55/+60
* 2004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-091-6/+43
* * interp.c (fsca_s, fsrra_s): New functions.Joern Rennecke2003-11-031-0/+49
* include/gdb:Joern Rennecke2003-10-151-0/+11
* 2003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>Michael Snyder2003-08-111-0/+52
* Index: arm/ChangeLogAndrew Cagney2003-02-271-3/+3
* gcc uses trap 33 for profiling, but the simulator didn't support it.Joern Rennecke2002-10-111-4/+15
* include/gdb:Joern Rennecke2002-07-171-114/+163
* * interp.c (sim_resume): Fix setting of bus error forJoern Rennecke2002-06-181-1/+1
* Move include/callback.h and include/remote-sim.h to include/gdb/.Andrew Cagney2002-06-091-2/+2
* * interp.c (sim_create_inferior): Record program arguments forAlexandre Oliva2001-01-301-3/+45
* * interp.c (trap): Implement time.Alexandre Oliva2001-01-241-0/+3
* sh-dsp support, simulator speedup by using host byte order:Joern Rennecke2000-05-151-304/+891
* import gdb-19990422 snapshotStan Shebs1999-04-261-24/+213
* Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1999-04-161-0/+1414
* Initial creation of sourceware repositoryStan Shebs1999-04-161-1663/+0
* Comment typo fix.Joern Rennecke1997-09-021-1/+1
* Sanitation fixes.Joern Rennecke1997-09-021-1/+41
* Merge SH4 branch simulator in to devo.Andrew Cagney1997-09-021-124/+448
* Add ABFD argument to sim_create_inferior. Document.Andrew Cagney1997-08-271-2/+6
* Flush defunct sim_kill.Andrew Cagney1997-08-261-7/+0