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| author |   Palmer Dabbelt <palmer@dabbelt.com> | 2015-10-14 15:51:35 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2015-10-14 15:51:35 -0700 |
| commit | 0ea0a00dc5ee51abf7265c700e34507eef0f6999 (patch) | |
| tree | d7a3ef5e352908e7ff4d63d6c18ee404642b3d3f | |
| parent | Add a Caffe ebuild (diff) | |
| download | palmer-0ea0a00dc5ee51abf7265c700e34507eef0f6999.tar.gz palmer-0ea0a00dc5ee51abf7265c700e34507eef0f6999.tar.bz2 palmer-0ea0a00dc5ee51abf7265c700e34507eef0f6999.zip | |
Update iverilog to 10.0
| -rw-r--r-- | sci-electronics/iverilog/Manifest | 2 | ||||
| -rw-r--r-- | sci-electronics/iverilog/iverilog-10.0.ebuild | 50 |
2 files changed, 52 insertions, 0 deletions
diff --git a/sci-electronics/iverilog/Manifest b/sci-electronics/iverilog/Manifest new file mode 100644 index 0000000..a4b47c8 --- /dev/null +++ b/sci-electronics/iverilog/Manifest @@ -0,0 +1,2 @@ +DIST verilog-10.0.tar.gz 1683102 SHA256 179f09afbafb951bea28c9001b06ed8b9b2e54181092d48e343cb20f436b1185 SHA512 55ce2585dbb2f1afaaa03bfd31524db9f8730e2043f717728979357ee87758b5de61b96abc784feb6be44d537ea95182fae6408fffc140d95758750bf2d7ed99 WHIRLPOOL 5adb2c7ab97f86da70c086cb0ae45bab5974865d679472a0178b6de78f56d15e99ed4091a991266e4177ab5b25fdd7175818b48b15196ea006e2dfd8f97a24c9 +EBUILD iverilog-10.0.ebuild 1134 SHA256 17b4872270db91da0f4b444e0986a01bb168cacf7c3e9b2788da6c4cc531ccaa SHA512 8913629167401d862d0376ed5e1ac5d7022521356f9ad8a86c91fe07c6f3cf82dfc34f3a7009827e115e12dbfe7a3264a804daeb72381e9675c68fa557fa01bc WHIRLPOOL a2cf6f2a70dd7c4a67f86ad874af413386d77e7840959cbd76dfdb666b66f72015217458ef1743942546364e0647ca39f75f2c3978597aa257356d529dc740e8 diff --git a/sci-electronics/iverilog/iverilog-10.0.ebuild b/sci-electronics/iverilog/iverilog-10.0.ebuild new file mode 100644 index 0000000..e6e8623 --- /dev/null +++ b/sci-electronics/iverilog/iverilog-10.0.ebuild @@ -0,0 +1,50 @@ +# Copyright 1999-2014 Gentoo Foundation +# Distributed under the terms of the GNU General Public License v2 +# $Id$ + +EAPI=4 + +inherit eutils multilib + +DESCRIPTION="A Verilog simulation and synthesis tool" +SRC_URI="ftp://icarus.com/pub/eda/verilog/v${PV:0:2}/verilog-${PV}.tar.gz" +HOMEPAGE="http://iverilog.icarus.com/" + +LICENSE="GPL-2" +SLOT="0" +KEYWORDS="~amd64 ~ppc ~sparc ~x86" +IUSE="examples" + +RDEPEND="app-arch/bzip2 + sys-libs/readline + sys-libs/zlib" +DEPEND="${RDEPEND}" + +S="${WORKDIR}/verilog-${PV}" + +src_prepare() { + # Fix tests + mkdir -p lib/ivl + touch lib/ivl/ivl + sed -i -e 's/driver\/iverilog -B./IVERILOG_ROOT="." driver\/iverilog -B./' Makefile.in || die + + # Fix LDFLAGS + sed -i -e 's/@shared@/@shared@ $(LDFLAGS)/' {cadpli,tgt-vhdl,tgt-null,tgt-stub,tgt-vvp}/Makefile.in || die +} + +src_install() { + emake -j1 \ + prefix="${ED}"/usr \ + mandir="${ED}"/usr/share/man \ + infodir="${ED}"/usr/share/info \ + libdir="${ED}"/usr/$(get_libdir) \ + libdir64="${ED}"/usr/$(get_libdir) \ + vpidir="${ED}"/usr/$(get_libdir)/ivl \ + install + + dodoc *.txt + if use examples ; then + insinto /usr/share/doc/${PF} + doins -r examples + fi +} |